UP6182 Нет дежурки

Enable and Soft Start
EN0 is the control pin of VREG5, VREG3 and VREF
regulators. Connect this node to GND disables
three regulators and decrease the shutdown supply current
to 10uA. Connect this node to 3.3V or 5V will turn the
three regulators on to standby mode. Two SMPSs become
ready to enable at this standby mode. The uP6182 has an
internal 1.6 ms output voltage soft start for each channel.
When the ENx pin becomes high level, an internal SSD
begins ramping up the reference voltage to the reference
voltage of Pwm. The uP6182 shares one SS with both
channels, if ENx pin becomes high level while another
channel is starting up, soft start is postponed until another
channel soft start has completed. If both of EN1 and EN2
become high level at a same time (within 60 us), both
channels start up at 1.6ms soft start time.
POK
The uP6182 has one POK output indicator, when both
SMPS outputs are within the targets. The POK function is
activated with 2ms delay after ENx goes high. If the
output voltage is within +/-5% of the target value, internal
comparators detect power good state and the POK signal
becomes high after 510µs delay. Therefore POK goes high
around 2.5ms after ENx goes high. If the output voltage
goes outside of +/-10% of the target value, the POK signal
becomes low after 2µs delay. The POK output is an open
drain output and is needed to be pulled up to output voltage
source.

 

Отстань от дежурки , микруха у тебя и старая скорей всего рабочая, смотри что садит ее или не дает запуск ее , , по дросселям дежурки сопротивление какое вообще и по другим дросселям , ресет проца есть , слипы поднимаются ?